Analog IC Layout Team Lead

Lightmatter builds chips for artificial intelligence computing that leverage unique properties of light for efficient computing and communications. If you're a collaborative engineer or scientist who has a passion for innovation, solving challenging technical problems, and doing impactful work...work like building the world's first optical computers and developing high-speed silicon photonics-based optical interconnect solutions, consider joining the team at Lightmatter!

In this role, you will be a key member of the analog team architecting the world's first photonic computers. This is fundamentally an interdisciplinary team and outside-the-box thinking is the daily norm. You will lead our custom-layout team and the execution of layouts for mixed-signal and analog circuits. In addition, review/analyze floorplans and circuits with circuit designers, and run a complete set of design verification tools available for AMS blocks. Using advanced CAD tools and your mask design knowledge you’ll deliver correct and robust layouts that meet stringent speed performance, area, and reliability requirements.

Responsibilities

• Collaborate with top-level chip lead to define floorplan and layout requirements from block-level to top-level

• Oversee the layout of analog circuit blocks with attention to matching, parasitics, noise isolation, and other concepts such as IR drop and reliability

• Develop layout strategies and plans to ensure project timelines and milestones are met

• Implement best practices and methodologies for analog IC layout, including DFM (Design for Manufacturability) and DRC (Design Rule Checking)

• Review and optimize layouts for performance factors such as speed, noise, and reliability

• Troubleshoot and resolve layout issues during the IC design process, including LVS (Layout Versus Schematic) and ERC (Electrical Rule Check) failures

• Prepare technical reports and documentation for IC layout designs and processes

• Ensure our CAD design environment is up-to-date and coordinate new automation to enhance our analog/mixed-signal EDA flow

Requirements

• Bachelor's degree with 12+ years of layout experience

• 3 years of people management experience

• Experience with analog and mixed-signal layouts for deep submicron CMOS circuits

• Experience leading analog and mixed-signal layouts for large chip

• Solid knowledge of analog-on-top (big A - small D) and digital-on-top (small A - big D) design flow

• High-level proficiency in interpretation of DRC, ERC, LVS, etc. reports

• Proficiency in using industry-standard design software, including Cadence Virtuoso, Cadence/Calibre DRC, LVS tools

• Experience in revision control software such as Cliosoft SOS and Git

• Proven ability to manage and prioritize multiple projects and tasks

Preferred Qualifications

• Excellent communication skills and ability to work with remote teams

• Experience in maintaining design kits including verification decks (DRC, LVS, ERC, and EXT)

Benefits

• Comprehensive Health Care Plan (Medical, Dental & Vision)

• 401k matching

• Life Insurance (Basic, Voluntary & AD&D)

• Generous Time Off (Vacation, Sick & Public Holidays)

• Paid Family Leave

• Short Term & Long Term Disability

• Training & Development

• Flexible, hybrid workplace model

• Stock Option Plan

We offer competitive compensation. The base salary range for this role, inclusive of all US locations, $170,00 - 220,000 Your base salary will be determined based on location, experience, educational background, and market data.

Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.